Bob, I still haven’t seen anything technically specific about how these inherently floating-point ADCs are done. But I can imagine schemes that may or may not be “legit”. One is using a ΣΔ modulator of some kind. Now the output of that is +1 or -1 (but clocking at you at 3 or 6 MHz). Now at that superhigh frequency, you can think of the local “DC value” of that sorta random toggling bit as the audio sample at the slower 48 kHz rate. It’s not DC, but “slowly varying DC”, but at 6 MHz bit rate “slowly” means audio. Sorta like modulation of either AM or FM radio.
Now, to get that slowly varying DC value, we gotta low-pass filter that sorta random toggling thing. That’s doing DSP at a 6 MHz sample rate. The process is called anti-imaging low-pass filtering and decimation. That DSP could be done in floating-point.
Or that DSP could be done in fixed-point and the result converted to float. I am not sure it would come out better or worser. I am not sure that it wouldn’t be a gimmick.
You can do other things that might work or might be gimmicky. You could have your audio go into several identical high-quality ADCs (each with fixed-point outputs) but each ADC is scaled differently at the front end analog input. The outputs of all the ADCs go into a DSP that’s cleverly programmed to reconcile the different scaled values of the same input voltage. And that DSP would be smart enough to know when the lower voltage ADCs (the ones with higher gain) are saturated and will not use that ADC in its calculation of the likely voltage. That might be a meaningful floating-point value. I dunno.